Patent
1994-07-29
1998-09-15
Harvey, Jack B.
395580, G06F 900
Patent
active
058092935
ABSTRACT:
A system and method for tracing program code within a processor having an embedded cache memory. The non-invasive tracing technique minimizes the need for trace information to be broadcast externally. The tracing technique monitors changes in instruction flow from the normal execution stream of the code. The tracing technique monitors the updating of processor branch target register contents in order to monitor branch target flow of the code. A FIFO and serial logic circuitry is utilized to minimize the number of chip pins required to broadcast the information from the chip. The tracing technique utilizes instruction and data breakpoint debug functions to signal an external trace tool that a trace event has occurred.
REFERENCES:
patent: 4674089 (1987-06-01), Poret et al.
patent: 5053949 (1991-10-01), Allison et al.
patent: 5253255 (1993-10-01), Carbine et al.
patent: 5313583 (1994-05-01), Yokota et al.
patent: 5442756 (1995-08-01), Grochowski et al.
patent: 5488688 (1996-01-01), Gonzales
patent: 5586336 (1996-12-01), Nakamura et al.
Bridges Jeffrey Todd
Collopy Thomas K.
Dieffenderfer James N.
Irene Thomas Joseph
Linzer Harry I.
Harvey Jack B.
International Business Machines - Corporation
Phillips Steven B.
Wiley David A.
LandOfFree
System and method for program execution tracing within an integr does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for program execution tracing within an integr, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for program execution tracing within an integr will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-101046