Electrical computers and digital data processing systems: input/ – Interrupt processing – Processor status
Reexamination Certificate
2007-04-03
2007-04-03
Rinehart, Mark H. (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
Processor status
C710S260000
Reexamination Certificate
active
10926666
ABSTRACT:
A system and method for processing system management interrupts in multiple processor systems is disclosed. In one embodiment, a method for processing a system management interrupt (SMI) in an information handling system including, for each processor, identifying whether the processor is an interrupt handling processor assigned to perform processing tasks necessary for resolving the SMI or a non-interrupt handling processor not assigned to perform the processing tasks necessary for resolving the SMI. The method further including, for each non-interrupt handling processor, setting the non-interrupt handling processor into a wait for Start-up Inter-Processor Interrupt (SIPI) mode. The method further including, for the interrupt handling processor, performing the processing tasks necessary for resolving the SMI such that upon entry into a SMI handler the interrupt handling processor enters and exits the SMI handler without synchronization with the non-interrupt handling processors.
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Baker & Botts L.L.P.
Daley Christopher
Dell Products L.P.
Rinehart Mark H.
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