Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-01-24
2006-01-24
Beausoliel, Robert (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S057000, C714S051000, C714S052000
Reexamination Certificate
active
06990612
ABSTRACT:
The present invention provides systems and methods for preventing software errors caused by address range or alignment errors. In architecture, a representative system includes a compiler that parses a program and further comprises a logic that generates a verification value for a block of code in the program, a logic that stores the verification value in the block of code, and a logic that inserts verification value instruction code into the block of code. The present invention can also be viewed as a method for preventing software errors in a program. A representative method operates by generating a verification value for a block of code in the program, and storing the verification value in the block of code. During execution of the program, a runtime verification value is generated for the block of code, and the block of code is executed if the verification value equals the runtime verification value, and generates an error message if the verification value does not equals the runtime verification value.
REFERENCES:
patent: 6122738 (2000-09-01), Millard
patent: 6732306 (2004-05-01), Dover et al.
Beausoliel Robert
Bonura Timothy M.
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