System and method for preserving an error margin for a...

Details System and method for preserving an error margin for a... System and method for preserving an error margin for a...

2007-09-11

2007-09-11

Dinh, Son (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S185210, C365S189090

Reexamination Certificate

active

11124939

ABSTRACT:
A system and method for preserving an error margin for a non-volatile memory that includes a memory cell, a reference cell coupled to a reference current mirror configured to mirror current through the reference cell. The system comprises a memory current mirror coupled to the memory cell and configured to mirror current through the memory cell. A sense amplifier has a first and a second input. The first input is coupled to the reference current mirror and the second input is coupled to the memory current mirror. The sense amplifier is configured to compare a voltage across the memory cell with a voltage across the reference cell.

REFERENCES:
patent: 4524412 (1985-06-01), Eng
patent: 5157269 (1992-10-01), Jordan et al.
patent: 5341108 (1994-08-01), Willocx et al.
patent: 6373304 (2002-04-01), Drost et al.
patent: 6717856 (2004-04-01), Srinivasan et al.
patent: 2004/0017249 (2004-01-01), Engl

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