System and method for performing wake-up operations to a memory

Details System and method for performing wake-up operations to a memory System and method for performing wake-up operations to a memory

1995-05-01

1996-09-17

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Data refresh

36492692, G11C 700

Patent

active

055575773

ABSTRACT:
A system and method are provided which ensure that the required number of refreshes are executed by the memory after powering on. A counter of a refresh processor is initialized to a reset value after completing a reset interval so that the required number of refreshes correspond to high priority requests to ensure that the required number of refreshes will be executed before any other requests. As a result, the system and method ensure that the wake-up period performs the required refreshes after powering on the memory in a simplified and reliable manner.

REFERENCES:
patent: 4918645 (1990-04-01), Lagoy, Jr.
patent: 5021951 (1991-06-01), Baba
patent: 5031147 (1991-07-01), Maruyama et al.
patent: 5283885 (1994-02-01), Hollerbauer
patent: 5345574 (1994-09-01), Sakurada et al.
patent: 5418920 (1995-05-01), Kuddes

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