System and method for performing transistor-level static...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C716S030000, C716S030000, C703S014000

Reexamination Certificate

active

07865856

ABSTRACT:
A method of using a static performance analyzer that accepts as input a cell-level netlist, to perform static performance analysis on a circuit represented by a transistor level netlist. The method begins with converting said transistor-level netlist to a cell-level netlist by modeling individual transistors with a cell model. Then, a static performance analyzer is used to perform a static performance analysis of said cell-level netlist. Among performance characteristics that may be analyzed are timing (static timing analysis) and leakage power. The method described may also be used for statistical static timing and power analysis.

REFERENCES:
patent: 5036473 (1991-07-01), Butts et al.
patent: 5625803 (1997-04-01), McNelly et al.
patent: 5692160 (1997-11-01), Sarin
patent: 5734798 (1998-03-01), Allred
patent: 5872953 (1999-02-01), Bailey
patent: 7243320 (2007-07-01), Chiu et al.
patent: 7469394 (2008-12-01), Hutton et al.
patent: 2003/0099129 (2003-05-01), Amatangelo et al.
patent: 2007/0006110 (2007-01-01), Naka et al.
patent: 2009/0019411 (2009-01-01), Chandra et al.
Sherwood, W. “A MOS Modelling Technique for 4-State True-Value Hierarchical Logic Simulation or Karnough Knowledge”; Design Automation; 18th Conference on Jun. 29, 1981; pp. 775-785.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

System and method for performing transistor-level static... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for performing transistor-level static..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for performing transistor-level static... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2659330

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.