System and method for performing masked store operations in...

Details System and method for performing masked store operations in... System and method for performing masked store operations in...

2011-04-05

2011-04-05

Nguyen, Hiep T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

Reexamination Certificate

active

07921263

ABSTRACT:
A system and method for accelerated handling of masked store operations in a processor or processor-based system/chip are described. A set of instructions that support a store operation under a per-byte predicate mask is provided. The invention accelerates the handling of small transfers at arbitrary alignments, such as those used by xDSL modems to deal with ATM cells or Reed Solomon codewords.

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European Search Report issued in EP 19 39 727 A2, on Sep. 24, 2008.

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