Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2006-01-20
2009-11-03
Mai, Tan V (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
07613757
ABSTRACT:
The invention provides a system and method for generating a high rate pseudo-random noise (PN) code with a parallel PN generator. The method includes the operation of configuring L programmable PN generators to each output every Lthchip of a PN code. Select PN generators of the L PN generators can be configured to have their output delayed for a predetermined number of chips less than or equal to L when a fine slip is needed to allow the high rate PN code to be delayed for a set number of chips to synchronize the high rate PN code with another PN code. The outputs of each of the L programmable PN generators can be multiplexed to produce the high rate PN code.
REFERENCES:
patent: 4375620 (1983-03-01), Singer et al.
patent: 5550846 (1996-08-01), Staiger
patent: 6640236 (2003-10-01), Lupin et al.
patent: 7174355 (2007-02-01), Henry et al.
patent: 2001/0003530 (2001-06-01), Sriram et al.
patent: 2003/0122697 (2003-07-01), Schooler et al.
patent: 2004/0015527 (2004-01-01), Sriram et al.
Abbaszadeh Ayyoob
Altaf Rahman
Kirton & McConkie
L-3 Communications Corp.
Mai Tan V
Ralston William T.
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