System and method for optimizing bus bandwidth utilization...

Details System and method for optimizing bus bandwidth utilization... System and method for optimizing bus bandwidth utilization...

2006-07-11

2006-07-11

Nguyen, T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S141000, C711S133000, C711S142000, C711S144000

Reexamination Certificate

active

07076614

ABSTRACT:
A system and method of optimizing system memory bus bandwidth in a computer system. The system prepares to receive first data from system memory in accordance with at least one read request by evicting previously stored second data to a write back buffer. The at least one read request is then issued consecutively to system memory via the system memory bus. After issuance of the at least one read request, at least one write request is issued consecutively to send the second data in the write back buffer to the system memory via the system memory bus. The consecutive issuance of read and write requests avoids read-to-write and write-to-read bubbles that occur when alternating read and write requests are issued to system memory.

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