System and method for optimizing a memory controller

Details System and method for optimizing a memory controller System and method for optimizing a memory controller

2006-05-02

2009-12-01

Thai, Tuan V (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Memory configuring

C711S100000, C711S105000, C711S163000, C713S320000, C713S600000, C713S001000, C713S002000, C713S100000, C710S100000

Reexamination Certificate

active

07627730

ABSTRACT:
A system and method for optimizing a memory controller. The system includes a memory controller and at least two registers for storing a plurality of operating contexts for the memory controller. The plurality of operating contexts is utilized by the memory controller to optimize the memory controller. According to the system and method disclosed herein, the operating contexts optimize the performance of the memory controller.

REFERENCES:
patent: 5890014 (1999-03-01), Long
patent: 6631440 (2003-10-01), Jenne et al.
patent: 2005/0120161 (2005-06-01), Barth et al.
patent: 2005/0125702 (2005-06-01), Huang et al.
DRAM Data Book, published on Oct. 1997.

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