System and method for non-destructive handling of outsized...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C711S118000

Reexamination Certificate

active

07325098

ABSTRACT:
An extended data queue is added to the cache circuitry of a processor to handle extended data when the processor operates on a different architecture than the system it resides on. The extended data for each word coming into the processor is stored in the queue. If the extended data has some valid information, the word is replaced to ensure the information is not lost. If there is no valid information in the extended data, then the bits of the extended data are simply set to zero.

REFERENCES:
patent: 5414857 (1995-05-01), Jeddeloh et al.
patent: 5579504 (1996-11-01), Callander et al.
patent: 5721957 (1998-02-01), Huang et al.
patent: 6360194 (2002-03-01), Egolf
patent: 6760811 (2004-07-01), Buzby et al.
patent: 2002/0082822 (2002-06-01), Noyes

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