System and method for monitoring unaligned memory accesses

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C712S244000

Reexamination Certificate

active

06772372

ABSTRACT:

THE FIELD OF THE INVENTION
The present invention relates to monitoring unaligned memory accesses in computer systems, and more particularly to monitoring unaligned memory accesses in computer systems using hardware single-stepping.
BACKGROUND OF THE INVENTION
Computer systems include at least one processor and memory. The memory stores application program instructions, data, and an operating system. The operating system controls the processor and the memory for system operations and for executing the application program instructions.
Data stored in a memory of a computer system can be stored along natural boundaries, or may cross boundaries. For best performance, data should be aligned on natural memory boundaries. When a data item crosses a natural boundary and is stored on more than one line, multiple accesses are required to obtain the data, thereby decreasing system performance. Software preferably aligns data values to avoid possible performance degradation.
It would be desirable to monitor, count and trace unaligned memory accesses by an application program, for purposes of modifying the software to increase performance or for other purposes. One current solution for monitoring the execution of instructions in an application program is to build a software emulator to handle faulting instructions so that execution can continue when a fault occurs. However, this solution is very complex, and requires software to be developed that can update the processor state as if a faulting instruction had been executed.
Software debuggers have also been developed to monitor the execution of application program instructions. Software debuggers typically make use of a single-step feature. A single-step feature may be implemented in software, or may be a hardware feature provided by the processor. A single-step feature has been used by software debuggers to step through an application program one instruction at a time, monitor how the processor state changes after each instruction, and identify errors based on the changes in the processor state. A hardware single-step feature has not previously been used as part of a solution for monitoring, counting, and tracing unaligned memory accesses in an application program.
It would be desirable to provide a simplified solution for monitoring, counting and tracing unaligned memory accesses by an application program, without the requirement of building a complex software emulator.
SUMMARY OF THE INVENTION
The present invention provides a computer system and method for monitoring unaligned memory accesses by a processor of a computer system. The processor automatically generates a fault when attempting an unaligned memory access. Unaligned memory access faults are disabled in response to a fault generated by a first faulting instruction. The first faulting instruction is executed. A trap is generated by executing the first faulting instruction. Unaligned memory access faults are enabled in response to the trap.
In one embodiment, unaligned memory access faults are enabled before executing the first faulting instruction.
In one embodiment, a fault handler is invoked to process the fault. The step of disabling unaligned memory access faults is performed by the fault handler.
In one embodiment, a trap handler is invoked to process the trap. The step of enabling unaligned memory access faults is performed by the trap handler.
In one embodiment, a single-step mode of the processor is enabled in response to the fault. The single-step mode is enabled by setting a field in a system register of the processor.
In one embodiment, state information is stored in response to the fault. The state information includes the number of instructions that caused a fault and an identification of instructions that caused a fault.
One form of the present invention provides a method of executing instructions by a processor of a computer system controlled by an operating system. An unaligned memory access fault is generated based on the attempted execution of a first instruction. Unaligned memory access faults are disabled in response to the unaligned memory access fault. A single-step mode is enabled in response to the unaligned memory access fault. The first instruction is executed, thereby generating a single-step trap. Unaligned memory access faults are enabled in response to the single-step trap. The single-step mode is disabled in response to the single-step trap.
One form of the present invention provides a computer system including a processor. A memory stores an application program having application instructions. An operating system stored in the memory controls the processor. The operating system includes a fault handler and a trap handler. The fault handler disables unaligned memory access faults and enables a single-step mode in response to an unaligned memory access fault. The trap handler enables unaligned memory access faults and disables the single-step mode in response to a single-step trap.
One form of the present invention provides a computer readable medium containing an operating system for controlling a processor of a computer system to perform a method of monitoring unaligned memory accesses. The method includes disabling unaligned memory access faults in response to a fault generated by a first faulting instruction. The first faulting instruction is executed. A trap is generated by executing the first faulting instruction. Unaligned memory access faults are enabled in response to the trap.
The present invention provides a simplified solution for monitoring, counting and tracing unaligned memory accesses by an application program. In one embodiment, a hardware single-step feature of a processor is used to temporarily enable and disable unaligned memory accesses for particular instructions. The invention eliminates the need for building a complex software emulator.


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