System and method for mitigating imprint effect in ferroelectric

Details System and method for mitigating imprint effect in ferroelectric System and method for mitigating imprint effect in ferroelectric

1997-02-28

1998-04-28

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Ferroelectric

365200, G11C 700

Patent

active

057454035

ABSTRACT:
A system and method for mitigating undesired imprint effects in a ferroelectric memory array through the addition of a complementary data path which allows user data to be written to the array in an inverted state and then subsequently read out from the array in a re-inverted state in response to the state of at least one indicator bit corresponding to each row of the array.

REFERENCES:
patent: 4045779 (1977-08-01), Markle
patent: 4615030 (1986-09-01), Kumagai
patent: 4794597 (1988-12-01), Ooba et al.
patent: 5267204 (1993-11-01), Ashmore Jr.
"FM24C08 FRAM.RTM. Serial Memory Product Preview," .COPYRGT.1994 Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs CO 80921.
"FM24164 FRAM.RTM. Serial Memory Product Preview," .COPYRGT.1994 Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs CO 80921.
"FM24C168 FRAM.RTM. Serial Memory Product Specification," .COPYRGT.1994 Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs CO 80921, pp. 2-10 through 2-16.

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