System and method for measuring progress for formal...

Details System and method for measuring progress for formal... System and method for measuring progress for formal...

2005-03-24

2008-08-12

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

Reexamination Certificate

active

07412674

ABSTRACT:
A method and apparatus for measuring the progress of a formal verification process using an analysis region, and measures the effectiveness of the current set of properties/requirements in verifying different portions of logic within the design. The present invention applies the concept of analysis region to analyze the properties/requirements for a design. The analysis region can be expanded or contracted either manually or automatically based upon the results of the analysis. The present invention generates a visual display that is available to the user that represents the amount of source code in the analysis region for a given property or multiple properties in comparison to the maximum possible analysis region. The present invention can display this information in a bar graph format, on a line-by-line basis for the source code and on a waveform display, for example.

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Beer, I. et al., “RuleBase: An Industry-Oriented Formal Verification Tool,” 33rdDesign Automation Conference, DAC 1996.

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