System and method for manufacturing an integrated circuit...

Details System and method for manufacturing an integrated circuit... System and method for manufacturing an integrated circuit...

2011-03-29

2011-03-29

Pert, Evan (Department: 2893)

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

Using structure alterable to conductive state

C438S467000, C438S600000, C257SE21209

Reexamination Certificate

active

07915093

ABSTRACT:
A system and method are disclosed for manufacturing an integrated circuit anti-fuse in conjunction with a tungsten plug process. A tungsten plug is formed in a dielectric layer that overlies a portion of P type silicon and an adjacent portion of N type silicon. The dielectric layer is etched to create a first anti-fuse contact opening down to the underlying P type silicon and a second anti-fuse contact opening down to the underlying N type silicon. A metal layer is deposited over the tungsten plug and over the dielectric layer and etched to form an anti-fuse metal contact in each of two anti-fuse contact openings. A bias voltage is applied to the anti-fuse metal contacts to activate the anti-fuse.

REFERENCES:
patent: 6440781 (2002-08-01), Coppock et al.
patent: 6563189 (2003-05-01), Dark et al.
patent: 6815797 (2004-11-01), Dark et al.
patent: 2003/0062594 (2003-04-01), Chen
patent: 2005/0133882 (2005-06-01), Young

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