Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2003-08-20
2009-06-09
Sough, Hyung S (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
Reexamination Certificate
active
07546418
ABSTRACT:
A system and method for managing power consumption and data integrity in a computer system is disclosed in which the a memory controller of the computer system records in a buffer the addresses of writes to system memory that occur during the period that the processor is in a low power state. When the processor exits the low power state, the processor invalidates in its internal cache those cache lines that correspond to the addresses recorded in the buffer.
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Ahmed Hamdy S
Baker & Botts L.L.P.
Dell Products L.P.
Sough Hyung S
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