System and method for managing CPCI buses in a...

Details System and method for managing CPCI buses in a... System and method for managing CPCI buses in a...

2005-11-22

2005-11-22

Dang, Khanh (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

C710S113000, C710S301000

Reexamination Certificate

active

06968407

ABSTRACT:
The present invention relates to a system and method for managing Compact Component Interconnect (CPCI) buses in a multi-processing system. More particularly, the present invention improves performance and reliability of boards or systems using CPCI buses as the basic buses, by enabling all slots on a CPCI bus to function as system slots and thus obtaining the effect of parallel processing. The present invention makes it possible for all the slots on the CPCI bus of a board or system, which uses the CPCI buses as basic buses, to function as system slots. Thus, several boards of one and the same function may be applied to all the slots. As a result, the present invention improves performance through the effect of parallel processing effect may also improve the reliability through the flexible operation of the system slot over the related art.

REFERENCES:
patent: 4375639 (1983-03-01), Johnson, Jr.
patent: 6161197 (2000-12-01), Lanus et al.
patent: 6209051 (2001-03-01), Hill et al.
patent: 2003/0023802 (2003-01-01), Ho et al.
patent: 2003/0065861 (2003-04-01), Clark et al.

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