Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Patent
1999-01-12
2000-04-11
Chan, Eddie P.
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
711149, G06F 1314
Patent
active
060498471
ABSTRACT:
A cache-coherent, multiple-bus, multiprocessing system and method interconnects multiple system buses and an I/O bus to a shared main memory and efficiently maintains cache coherency while minimizing the impact to latency and total bandwidth within the system. The system provides coherency filters which coordinate bus-to-bus communications in such a way as to maintain cache memory coherency with a small amount of cross-bus traffic. In addition, the system provides a multiported pool of memory cells which interconnect the multiple buses.
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Chang Stephen S.
Vogt Pete D.
White George P.
Chan Eddie P.
Corollary, Inc.
Portka Gary J.
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