System and method for lamp split zone control

Electric heating – Heating devices – Combined with container – enclosure – or support for material...

Reexamination Certificate

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C219S390000, C219S497000, C392S418000

Reexamination Certificate

active

06570137

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to thermal processing. More particularly, the invention is directed to a system and method for improving heating lamp reliability in semiconductor thermal processing systems.
2. Description of Related Art
Individual semiconductors or integrated circuit (IC) devices are typically formed on a semiconductor wafer by numerous different processes. In a number of these processes a thermal processing system is used to heat the semiconductor wafer to high temperatures so that various chemical and physical reactions can take place as the wafer is fabricated into multiple IC devices. These thermal processing systems typically include a heat source and a wafer holder for holding the semiconductor wafer adjacent the heat source during thermal processing.
Modem thermal processing systems heat the semiconductor wafers under controlled conditions according to predetermined thermal recipes. These thermal recipes fundamentally consist of a temperature that the semiconductor wafer must be heated to, and the time that the thermal processing system remains at that temperature. For example, thermal recipes may require the semiconductor wafer to be heated to distinct temperatures between 30 and 1200 degrees Celsius, for processing times at each distinct temperature of between and 0 and 60 seconds.
To meet certain objectives, such as minimal diffusion, these thermal processing systems must also restrict the amount of time that each semiconductor wafer is subjected to a high temperature. To accomplish this, the temperature ramp rate is often very steep, i.e., the thermal processing system often needs to change from a high to low temperature, or visa versa, in as short a time as possible.
These steep temperature ramp rates led to the development of Rapid Thermal Processing (RTP). During RTP the semiconductor wafer is irradiated with a radiant heat source powerful enough to quickly raise the temperature of the semiconductor wafer to the desired process temperature and hold it at that temperature for a sufficient period of time to accomplish a specific process step. Typical temperature ramp rates for RTP range from 20-100 degrees Celsius/second as compared to 5-15 degrees Celsius/minute for conventional furnaces.
RTP is typically used for thermal oxidation, Chemical Vapor Deposition (CVD), wafer bonding, and annealing. What is more, RTP is rapidly becoming the technology of choice for oxidation and annealing steps in advanced ultra-large scale integration (ULSI) fabrication.
The radiant heat sources used in RTP systems mostly consist of tungsten-halogen or arc lamps arranged in a linear or circular array. This array is typically located directly above, below, or both above and below the semiconductor wafer. RTP systems may also rotate the semiconductor wafer to more evenly distribute temperature across the surface of the semiconductor wafer.
Since these lamps have very low thermal mass relative to furnaces, the wafer can be heated rapidly. Rapid wafer cooling is also easily achieved since the heat source may be turned off quickly without requiring a slow temperature ramp-down. Lamp heating of the wafer minimizes the thermal mass effects of the process chamber and allows rapid real time control over the wafer temperature.
An example of a typical prior art RTP system
102
is shown in FIG.
1
. The RTP system
102
is shown in an open or non operational position. Such an RTP system
102
comprises a lid
104
housing a circular array of heating lamps
110
, and a RTP chamber
108
housing a semiconductor wafer
106
. These arrays typically have about 211 lamps for a 200 mm semiconductor wafer.
While these RTP systems allow rapid heating and cooling, the temperature uniformity across the diameter of the semiconductor wafer is sensitive to radiative and conductive heat losses through the RTP chamber
108
walls. This results in wafer temperature non-uniformities usually appearing near the semiconductor wafer edges. Non-uniformity is undesirable since it leads to nonuniform material properties, such as alloy content, grain size, and dopant concentration. These nonuniform material properties degrade the circuitry and decrease IC device yield per semiconductor wafer.
One system for compensating for these wafer temperature non-uniformities separates the array of heating lamps into multiple independently controlled heating zones arranged in a plurality of concentric rings. An example of such a system is disclosed in Applicant's U.S. Pat. No. 5,689,614, which is incorporated herein by reference. Applicant's tools incorporating such as system is sold under the RADIANCE® brand. At predetermined times during the thermal cycle, the temperature of the outer heating zone is raised higher than the inner heating zones to compensate for any heat losses to the RTP chamber wall and/or the process kit. The process kit is the edge ring and support cylinder. The wafer sits on the edge ring throughout processing. The edge ring is made of Silicon Carbide and it's presence increases the thermal mass at the edge of the wafer.
FIG. 2
is a graph
200
of the temperature difference between the center
202
and edge
204
of a semiconductor wafer as a function of time for a RTP system similar to that shown in FIG.
1
and having multiple independently controlled heating zones. During the temperature ramp-up period of the thermal cycle the zone near the edge
204
of the semiconductor wafer is at a higher temperature than the zone at the center
202
of the semiconductor wafer. Whereas, during the soak and ramp-down periods the zone near the edge
204
is cooler than the zone at the center
202
.
However, individual lamps of these inner and outer zones tend to degrade at different rates. In particular, users of these multi zoned circular lamp arrays have found that the outer zone lamps tend to have a lower reliability and fail more often than the inner zone lamps, i.e., they had a lower life than that predicted. No reason for this increased failure was known other than that the outer zone lamps sometimes operated at a higher temperature to compensate for heat loss near the wafer's edge. Indeed, lamps tested through the same amount of thermal cycles did not have the same increased failure as those used in actual IC device fabrication.
FIG. 3A
shows a typical tungsten-halogen lamp
300
from an inner heating zone, after a set amount of thermal cycles. Notice that the coils of the filament
302
are evenly spaced. These tungsten-halogen lamps are made by PHILIPS, OSRAM, USHIO, etc. In contrast,
FIG. 3B
shows a failed outer zone lamp
304
from actual IC device fabrication after the same amount of thermal cycles. Here, the coils of filament
306
can be seen to be sagging.
Sagging occurs as the filaments plastically deform in response to an applied shear stress, such as gravity. Typically, a primary turn of the filament is wound first. This coiled wire is wound again into a larger coil to form a secondary turn. Stress on the coil is a function of the diameter of the primary turn and the lever arm created by the secondary turn as well as the number of secondary turns. Creep appears at the top of the coil where the stress is at a maximum causing the filament to sag until the lower coils are in contact causing a short or arc. This is called “coil stacking.” The progression of sag is not linear in time and appears just before failure. Once sag occurs, the coils touch one another, thereby shorting-out the filament and destroying the lamp
304
. This is known in the lamp industry as filament arcing or arc-out.
In light of the above, there is a need for a system and method that identifies and addresses the cause of this lower than predicted lamp reliability. Particularly, it would be highly desirable to have a system and method for increasing lamp life for outer zone lamps of a multi-zone circular lamp array.
BRIEF SUMMARY OF THE INVENTION
According to the invention there is provided a method for increasing lamp life in a thermal process

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