Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing
Reexamination Certificate
1999-10-27
2003-01-07
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output process timing
C713S400000, C713S401000
Reexamination Certificate
active
06505261
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to data communications, and more particularly to a system and method for initiating an operating frequency using dual-use signal lines.
2. Description of the Related Art
In computer systems, especially computer systems including devices that may operate according to differing internal clocks with different clock rates, some mechanism is needed to assure that devices are initialized to their proper clock rate. For example, a processor in a computer system must be initialized to its operating frequency clock rate. Typically, a system clock that operates at a relatively slow clock frequency is used as a timing reference for the computer system.
One solution to initializing devices in computer systems is either to operate at the system clock rate or to operate at a predetermined multiple of the system clock rate. The computer system may be designed so that each device in the computer system operates at a fixed multiple of the system clock rate. One problem that arises is that certain devices in the computer system, such as processors, may operate at one or more different clock rates based on which processor is included in the computer system. It may also be desirable to allow for upgrading the processor or other device to one that operates according to a faster clock rate than originally designed.
What is needed is a system and method for initializing an operating frequency of a device in a computer system. It would be desirable for the system and method to use a minimum amount of resources of the computer system.
SUMMARY OF THE INVENTION
The problems outlined above may be in large part solved by a system and method for inputting a set of values, e.g. an operating frequency, using dual-use signal connections. In an exemplary computer system, one or more processors are each coupled to a bridge. The dual-use signal connections are used to input an operating frequency ratio to a processor. The operating frequency ratio may also be input to the bridge. Once the operation of the processor has been initialized, the dual-use signal connections may be used to output operating parameters of the processor. The use of the dual-use signal connections may advantageously allow the operating frequency ratio to be input to the processor without dedicated signal lines or pins.
Broadly speaking, a device is contemplated, comprising a plurality of connections and a plurality of input/output drivers. The device is configured to receive a first set of values over a first one or more of the plurality of connections. The plurality of input/output drivers is coupled to the plurality of connections and is configured to accept the first set of values through the first group of the plurality of connections. A first one or more of the plurality of input/output drivers is further configured to output a second set of values over the first one or more of the plurality of connections. In one embodiment, the first set of values includes an operating parameter for the device. The operating parameter for the device may be the operating frequency ratio.
In various embodiments, the first set of values may be provided to the device on a substantially continual basis or only at predetermined times. The second set of values may be output by overdriving the first set of values. In one embodiment, the device may further include signature bit logic coupled to the plurality of input/output drivers. The signature bit logic is configured to provide signature bits to the plurality of input/output drivers for output. In another embodiment, the device further comprises a performance monitor coupled to the plurality of input/output drivers. The performance monitor is configured to provide an encoded operating parameter to the plurality of input/output drivers. The plurality of input/output drivers is preferably configured to output the encoded operating parameter as the second set of values over the first one or more of the plurality of connections. The encoded operating parameter may include a number of cache hits or misses in a predetermined period of time or a number of breakpoints over a predetermined period of time. The device may be a processor and may further comprise a microcode engine coupled to the plurality of input/output drivers. The microcode engine is configured to output an encoded operating parameter to the plurality of input/output drivers. The encoded operating parameter may include a number of branches taken since a previous rising edge of a clock signal.
A method for operating a device that includes a plurality of connections is also contemplated. The method comprises providing to the device a first set of values over a first one or more of the plurality of connections, sampling the first set of values from the first one or more of the plurality of connections, and transmitting from the device a second set of values over the first one or more of the plurality of connections. The first set of values corresponds to an operating parameter for the device. The second set of values is different from the first set of values.
In various embodiments, the operating parameter for the device may include an operating frequency ratio. The first set of the plurality of connections may include any number of connections, preferably four connections. In one embodiment, providing to the device the first set of values over the first one or more of the plurality of connections includes the first set of values being provided on a substantially continual basis. In another embodiment, transmitting the second set of values over the first one or more of the plurality of connections includes the device outputting an encoded device parameter by overdriving the first set of values. The encoded device parameter may include system parameters such as a number of breakpoints encountered in a predetermined. period of time. In embodiments where the device is a processor, the processor may further include a microcode engine, where the encoded device parameter includes a status value for a microcode engine. The status value for the microcode engine may include an operating parameter, such as a number of branches taken since a previous rising edge of a clock signal.
A system is also contemplated. Broadly speaking, the system comprises a first signal, a second signal, a first device, and a second device. The first signal is provided on a substantially continual basis. The second signal provides substantially identical information as the first signal. The first device is coupled to receive the first signal through a first one or more of a first plurality of connectors. The first device is further configured to transmit a third signal different from the first signal over the first one or more of the first plurality of connectors. The second device is coupled to receive the second signal through a second one or more of a second plurality of connectors. In one embodiment, the first signal and the second signal include an operating frequency ratio. In another embodiment, the first device includes a processor and the second device includes a bridge. In still another embodiment, the third signal includes an encoded operating parameter for the first device.
REFERENCES:
patent: 3725793 (1973-04-01), Phillips
patent: 4929854 (1990-05-01), Iino et al.
patent: 4970405 (1990-11-01), Hagiwara
patent: 4989175 (1991-01-01), Boris et al.
patent: 5058132 (1991-10-01), Li
patent: 5256994 (1993-10-01), Langendorf
patent: 5295257 (1994-03-01), Berkovich et al.
patent: 5307381 (1994-04-01), Ahuja
patent: 5623522 (1997-04-01), Ito
patent: 5909563 (1999-06-01), Jacobs
patent: 6055645 (2000-04-01), Noble
patent: 0 273 234 (1988-07-01), None
Alpha Microprocessors SROM Mini-Debugger, User's Guide, Apr. 1999, Compaq Computer Corp., Chapter 2, pp. 1-5; Chapter 3, pp. 1-38.
Alpha 21264 Microprocessor Hardware Reference Manual, Jul. 1999, Compaq Computer Corp., Chapter 7, pp. 1-21; Chapter 11, pp. 1-7.
Digital Semiconductor Alpha 21164PC Microprocessor, Hardware Reference Manual, Sep. 1997, Dig
Madrid Philip Enrique
Meyer Derrick R.
Advanced Micro Devices , Inc.
Gaffin Jeffrey
Kivlin B. Noäl
Peyton Tammara R.
LandOfFree
System and method for initiating an operating frequency... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for initiating an operating frequency..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for initiating an operating frequency... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3028095