System and method for increasing the number of IO-s on a...

Details System and method for increasing the number of IO-s on a... System and method for increasing the number of IO-s on a...

2011-08-02

2011-08-02

Im, Junghwa M (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S783000, C257S782000, C257S678000, C257S774000, C257S684000, C257S690000, C257SE25023

Reexamination Certificate

active

07989940

ABSTRACT:
A multi-layer electronic package having polymeric tape layers, where at least one of the polymeric tape layers has a via, through hole, or aperture therein to pass wiring between the layers. This enables a balance of package size, adhesive thickness, chip access, inventory management, package width, JEDEC ball out, and die exposure. The polymeric tape layers have surface circuits (e.g., leads, pads, and wiring) located on the surface.

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patent: 2003/0162326 (2003-08-01), Tsubosaki et al.

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