Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2007-07-03
2007-07-03
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S159000, C711S129000, C711S133000
Reexamination Certificate
active
10855847
ABSTRACT:
A system and method for improving dynamic memory removals by reducing the file cache size prior to the dynamic memory removal operation initiating are provided. In one exemplary embodiment, the maximum amount of physical memory that can be used to cache files is reduced prior to performing a dynamic memory removal operation. Reducing the maximum amount of physical memory that can be used to cache files causes the page replacement algorithm to aggressively target file pages to bring the size of the file cache below the new maximum limit on the file cache size. This results in more file pages, rather than working storage pages, being paged-out.
REFERENCES:
patent: 6681305 (2004-01-01), Franke et al.
patent: 6766420 (2004-07-01), Rawson, III
patent: 6956507 (2005-10-01), Castelli et al.
patent: 6968424 (2005-11-01), Danilak
patent: 7047387 (2006-05-01), Goodsell
patent: 2005/0015562 (2005-01-01), Goodsell
IBM, “Dynamic Logical Partitioning in IBM eserver pSeries”, First Edition, Oct. 8, 2002, pp. i-9.
Hepkin David Alan
Olszewski Bret Ronald
Garg Rakesh
Kim Matthew
Patel Hetul
Salys Casimer K.
Yee Duke W.
LandOfFree
System and method for improving performance of dynamic... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for improving performance of dynamic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for improving performance of dynamic... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3720624