Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2000-10-24
2004-12-21
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S103000, C711S165000, C714S001000
Reexamination Certificate
active
06834331
ABSTRACT:
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A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
BACKGROUND OF THE INVENTION
The present invention relates generally to the use of flash memory for the storage of data. More particularly the invention relates to methods for erasing a flash memory, for writing data to a flash memory, and for reading data from a flash memory, all with improved data integrity.
A flash memory generally consists of a number of sectors of memory locations. The number of bytes of data in a sector and in the entire component varies greatly, depending on the particular flash memory component used. For example, a flash memory component may contain 2 megabytes (MB) of memory and it may be divided into 32 sectors, with each sector containing 64 kilobytes (KB) of memory. The most basic functions performed on a flash memory include writing data, reading data, and erasing data. Flash memory may only be erased an entire sector at a time. After a sector of flash memory is erased, the entire sector contains all binary ones. The flash memory may then be written or programmed by changing selected bits to a binary zero. Flash memory may generally be written or read a single byte at a time. The preferred embodiment of the present invention includes functions for erasing a sector of a flash memory component, as well as functions for allocating, writing, committing, reading, and freeing portions of a sector of a flash memory component. These portions of the flash memory will be referred to as “blocks of data.”
Flash memory is generally very reliable and consistent, in that all bits of a sector are generally changed to a binary one upon erasure, and, after data has been programmed into a flash memory, it may be read back out accurately and consistently, over a long period of time. However, it is well known in the art that the data in a flash memory may be corrupted if power to the flash memory is disrupted while the memory is being erased or programmed. Power disruptions may occur for various reasons, such as a user intentionally or inadvertently shutting off the power to a device, a battery running out of energy, or a failure in the public alternating current power system. If a power disruption occurs during the erasure of a sector, the integrity of the data in the entire sector may be compromised. If a power disruption occurs while a portion of the flash memory is being written, any bit that was to be cleared to a binary zero during the write operation may or may not have been cleared. In addition, if a power disruption occurs while writing to an Intel StrataFlash™ memory, a bit that is adjacent to a bit that is being cleared may also be changed either from a binary one to a binary zero, or from a binary zero to a binary one. This is due to the technology of the StrataFlash™ memory, which enables the storage of two bits in a single memory cell. Thus, if a power disruption occurs while writing a zero to either bit of a StrataFlash™ memory cell, either one or both bits may be a binary zero or a binary one.
Many existing devices and systems that contain flash memory have little or no safeguards against the possibility of the data in the memory being corrupted upon power disruption. A system and method are needed for controlling, programming, and accessing a flash memory that will improve the reliability of the flash memory data, in the event of a power disruption during erase and program operations.
BRIEF SUMMARY OF THE INVENTION
The present invention comprises a method of reclaiming data from a first data sector of a flash memory to a second data sector of a flash memory in a manner that enables for a resumption of the reclaiming method in the event of a power interruption during the method. This first method comprises the steps of writing a first value to a sector state register for the first data sector to indicate that the first data sector is in a first reclaiming state, writing a second value to a destination sector register for the first data sector to indicate that the first data sector will be reclaimed to the second data sector, writing a third value to the sector state register for the first data sector to indicate that the first data sector is in a second reclaiming state, erasing the second data sector, copying valid data from the first data sector to the second data sector, writing a fourth value to the sector state register for the second data sector to indicate that the valid data from the first data sector has been successfully copied to the second data sector, and writing a fifth value to the sector state register for the first data sector to indicate that the first data sector has been successfully reclaimed to the second data sector. In this method, reclaiming from the first data sector to the second data sector is permissible, while reclaiming from the second data sector to the first data sector is not permissible.
In one embodiment of the invention, the sector state registers and the destination sector register reside in the flash memory. In another embodiment, each of the sector state registers and the destination sector register comprises a plurality of memory cells, and each memory cell has a plurality of bits, wherein writing to a first bit of a memory cell may affect one or more other bits in the memory cell in case of a power interruption, and only one bit is used in each of the plurality of memory cells of the sector state registers and the destination sector register. In another embodiment, the second value is an encoded sector number for the second data sector. In yet another embodiment, the encoded sector number is obtained by duplicating each bit of a binary sector number for the second data sector. In another embodiment, a possible reclaiming source is a permissible reclaiming source for a reclaiming destination if:
(
RD−RS+NS
) %
NS<NS/
2
wherein RD is a sector number of the reclaiming destination, RS is a sector number of the possible reclaiming source, NS is a total number of data sectors in the flash memory, and “%” indicates a mathematical operation of dividing a first number by a second number and taking the remainder.
The present invention also comprises a method of maintaining a plurality of status bits in a flash memory component so that no more than one status bit may be corrupted at a time, wherein the flash memory component has a plurality of memory cells that each has a plurality of bits, and wherein writing to a first bit of a memory cell may affect one or more other bits in the memory cell in case of a power interruption. This second method comprises the steps of using a different memory cell for each status bit, selecting a first bit from a memory cell for use as the status bit for that memory cell and not using the rest of the plurality of bits in the memory cell, and writing each status bit in a different write operation. In more specific embodiments of this second method, the plurality of status bits may comprise a sector state register or a block state register. Also, the unused bits in a memory cell may be cleared to a binary zero or left at a binary one.
The present invention also comprises a method of encoding a sector number for storage in a destination sector register in a flash memory component, wherein the flash memory component comprises a plurality of memory cells that each has a plurality of bits, and wherein writing to a first bit in a memory cell may affect one or more other bits in the memory cell in case of a power interruption. This third method comprises the steps of representing the destination sector number in binary format and duplicating each bit of the binary representation of the destination sector number for storage in the destination sector register.
The present invention also comprises a method of
Bataille Pierre-Michel
Beffel, Jr. Ernest J.
Haynes Beffel & Wolfeld LLP
Starfish Software, Inc.
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