Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1995-10-02
1999-04-06
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711154, 39518204, 395824, G11B 1722, G06F 1312
Patent
active
058931384
ABSTRACT:
Disclosed is an array controller for controlling the transfer of data from a host system to an array of data storage devices, comprising a processor connected via a local bus to a data buffer in which data is staged during said transfer. The array controller is provided with a buffer controller for controlling the operation of the buffer and is further provided with channel hardware for manifesting a plurality of data channels, selectable by the local bus address, over which data is transferred in and out of the data buffer.
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Judd Ian David
Luning Stephen G.
Chan Eddie P.
International Business Machines - Corporation
Kim Hong C.
Klein Esther E.
Krall Noreen A.
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