Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2004-02-02
2008-03-25
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S145000, C711S144000, C711S167000, C713S001000
Reexamination Certificate
active
07350025
ABSTRACT:
The present invention is directed to a system and method for improved collection of application profile data for performance optimization. The invention provides a mechanism for storing usage bits within the hardware cache of a computing device. These usage bits provide profile data by tracking the memory usage data. In one embodiment, the present invention also provides usage bits for each level of a multi-stage hardware cache to provide multi-stage usage tracking.
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patent: 5740406 (1998-04-01), Rosenthal et al.
patent: 6014728 (2000-01-01), Baror
patent: 6338120 (2002-01-01), Hanley
patent: 2003/0046493 (2003-03-01), Coulson
patent: 2005/0086437 (2005-04-01), Modha
“Usage Dependent Cache Replacement by Ring Partitioned Groupings”, IBM Technical Disclosure Bulletin, Jun. 1972.
Bataille Pierre-Michel
Merchant & Gould P.C.
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