System and method for implementing a zero overhead loop

Details System and method for implementing a zero overhead loop System and method for implementing a zero overhead loop

2011-07-26

2011-07-26

Alrobaye, Idriss N (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S029000

Reexamination Certificate

active

07987347

ABSTRACT:
Systems and methods for implementing a zero overhead loop in a microprocessor or microprocessor based system/chip are disclosed. The systems and methods include the use of a breakpoint mechanism which is additionally used in debugging in order to provide some of the looping functionality.

REFERENCES:
patent: 4541048 (1985-09-01), Propster et al.
patent: 5617574 (1997-04-01), Boutaud et al.
patent: 5664159 (1997-09-01), Richter et al.
patent: 5687375 (1997-11-01), Schwiegelshohn
patent: 5727194 (1998-03-01), Shridhar et al.
patent: 5734880 (1998-03-01), Guttag et al.
patent: 6026484 (2000-02-01), Golston
patent: 6085315 (2000-07-01), Fleck et al.
patent: 6188411 (2001-02-01), Lai
patent: 6253307 (2001-06-01), Boutaud et al.
patent: 6269440 (2001-07-01), Fernando et al.
patent: 6286135 (2001-09-01), Santhanam
patent: 6367071 (2002-04-01), Cao et al.
patent: 6687813 (2004-02-01), Norman et al.
patent: 7159103 (2007-01-01), Ahmad et al.
patent: 7272704 (2007-09-01), Nguyen et al.
patent: 2003/0074650 (2003-04-01), Akgul et al.
patent: 2003/0200423 (2003-10-01), Ehlig et al.
patent: 2004/0003219 (2004-01-01), Uehara
patent: 2004/0193858 (2004-09-01), Ahmad et al.
patent: 2006/0095751 (2006-05-01), Bybell et al.
patent: 2006/0107028 (2006-05-01), Meuwissen et al.
patent: 2007/0186084 (2007-08-01), Chiba
patent: 2008/0141013 (2008-06-01), Klima et al.
patent: 2008/0155237 (2008-06-01), Dobson et al.
patent: 2008/0178160 (2008-07-01), Brock et al.
patent: 2009/0150658 (2009-06-01), Mizumo
patent: 2009/0327674 (2009-12-01), Codrescu et al.
patent: 2010/0211762 (2010-08-01), Saha et al.
“Techniques for Effectively Exploiting a Zero. Overhead Loop Buffer” Authors: Gang-Ryung Uh.; Yuhong Wang.; David Whalley.; Sanjay Jinturkar; Chris Burns; Vincent Cao; Publisher: Springer-Verlag London, UK; pp. 157-172, Jan. 1, 2000.
“Zero-overhead loop controller that implements multimedia algorithms” Authors: Kavvadias, N.; Nikolaidis, S.; Publisher: Computers and Digital Techniques, IEE Proceedings; pp. 517-526; Publication Date: Jul. 8, 2005.
“Effective exploitation of a zero overhead loop buffer” Authors: Uh, G.R.; Wang, Y.; Whalley, D; Jinturkar, S.; Burns, C.; Cao, V.; pp. 10-19, Publisher: ACM NY, NY, USA; Publication date: Oct. 17, 2003.
“Application of Zero Overhead loop and Address Generator in General Purpose Computing”, Author: Jinyung Namkoong; EE 482A Project Spring 2000, Standford University; pp. 1-14.

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