Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-03-08
2005-03-08
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S112000, C711S113000, C711S114000, C711S117000, C711S122000, C711S139000
Reexamination Certificate
active
06865650
ABSTRACT:
A system and method for storing data, the system having one or more storage devices, caches data from a sender into a first random-access structure located in a first cache level, caches data from the first cache level into a log structure located in a second cache level, and stores data from CL into a second random-access structure located in a storage level, wherein CL is the first cache level or the second cache level. In further embodiments of the invention, the second cache level caches in the log structure parity data for the data cached in the log structure. In a still further embodiment of the invention, the storage level stores in the second random-access structure parity data for the data stored in the second random-access structure.
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DesRoches David
Morley Steve
Percy John
Solomon Robert C.
Bromberg & Sunstein LLP
EMC Corporation
Namazi Mehdi
Padmanabhan Mano
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