System and method for hardware based reassembly of a...

Details System and method for hardware based reassembly of a... System and method for hardware based reassembly of a...

2005-07-05

2005-07-05

Huynh, Kim (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Frame forming

C370S474000

Reexamination Certificate

active

06915358

ABSTRACT:
A system and method for hardware based reassembly of a fragmented packet is shown. The method includes receiving a bandwidth request to transfer a data packet from the data provider. Then, bandwidth is allocated to the data provider, where the allocated bandwidth is less than the requested bandwidth. Next, the present invention receives part of the data packet in the allocated bandwidth from the data provider, where the part of the data packet includes a fragment header, and the fragment header includes a sequence number for the part of the data packet. The part of the data packet is then stored in external memory. Finally, the data packet is reassembled by concatenating in the correct sequence the part of the data packet with other parts of the data packets to create the reassembled data packet.

REFERENCES:
patent: 5396490 (1995-03-01), White et al.
patent: 5781549 (1998-07-01), Dai
patent: 6216171 (2001-04-01), Isono et al.
patent: 6263444 (2001-07-01), Fujita
patent: 6438123 (2002-08-01), Chapman
patent: 6515990 (2003-02-01), Leung

Affiliated with

Also associated with

Rating

System and method for hardware based reassembly of a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for hardware based reassembly of a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for hardware based reassembly of a... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3431609