Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-11-07
2006-11-07
Kim, Hong (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S119000, C711S129000, C711S135000, C711S137000, C712S233000, C712S244000
Reexamination Certificate
active
07133969
ABSTRACT:
A system may include an instruction cache, a trace cache including a plurality of trace cache entries, and a trace generator coupled to the instruction cache and the trace cache. The trace generator may be configured to receive a group of instructions output by the instruction cache for storage in one of the plurality of trace cache entries. The trace generator may be configured to detect an exceptional instruction within the group of instructions and to prevent the exceptional instruction from being stored in a same one of the plurality of trace cache entries as any non-exceptional instruction.
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Alsup Mitchell
Filippo Michael A.
McMinn Brian D.
Pickett James K.
Sander Benjamin T.
Advanced Micro Devices , Inc.
Kim Hong
Kowert Robert C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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