Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2006-03-21
2006-03-21
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
C710S262000, C710S264000, C710S266000, C710S268000, C710S106000, C713S400000, C345S504000
Reexamination Certificate
active
07016998
ABSTRACT:
A system and method for generating sequences of triggered events and for generating global interrupts in a clustered computer graphics system. In a sender-receiver dichotomy, one node is deemed the sender and the others act as receivers. The sender determines trigger values for each of the nodes in the system in order to achieve a particular operation sequence. In addition, a synchronization signal generator is provided to synchronize a timing signal between the sender and receiver nodes. Further, the sender designates one or more receiver nodes and causes them to turn on an interrupt enable register. In this way, the receiver nodes are able to be interrupted by the sender.
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Auve Glenn A.
King Justin
Silicon Graphics Inc.
Sterne Kessler Goldstein & Fox P.L.L.C.
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