Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2006-08-29
2006-08-29
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S306000, C710S313000
Reexamination Certificate
active
07099968
ABSTRACT:
A system and method predict when to generate a bus request ahead-of-time based on bus-activity, bus-usage efficiency and bus-bandwidth usage. A bus-usage efficiency indicator may be generated by a requester, such as a memory controller, based on a number of unused bus cycles that were granted to the requester during a prior observation window. The bus-bandwidth usage indicator may be generated by the requester based on a number of bus transactions effectively utilized by the requester during the prior observation window. The bus-activity indicator may be received from a bus arbiter to indicate system bus activity during a prior system-bus observation window. When the bus-activity indicator indicates that the system bus is busy, a requestor may transition between a full-speculation state, a delayed speculation state and a no-speculation state based on bus-usage efficiency and bandwidth usage. When the system bus is idle, a requester may remain in the full-speculation state.
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Auve Glenn A.
Schwegman Lundberg Woessner & Kluth P.A.
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