System and method for generating a reference clock

Details System and method for generating a reference clock System and method for generating a reference clock

2006-01-10

2006-01-10

Chin, Stephen (Department: 2634)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

Reexamination Certificate

active

06985552

ABSTRACT:
A system and method are provided for synchronizing a reference clock to a pseudorandom non-return to zero (NRZ) data stream in a clock data recovery system. The method comprises: sampling a pseudorandom NRZ data stream; determining a mean frequency of transitions (Fd) in the data stream; determining a transition probability (P) associated with the mean frequency of transitions; using a phase/frequency detector responsive to a VCO frequency, the mean frequency of transitions, and the transition probability; in response to using the phase/frequency detector, supplying a voltage controlled oscillator tuning voltage; generating the VCO frequency responsive to the tuning voltage; using a XOR phase detector to compare the VCO frequency to the NRZ data stream; in response to using the XOR phase detector, supplying a voltage controlled oscillator tuning voltage; and, generating the VCO frequency responsive to the tuning voltage. Also provided are a system and method for synchronizing a reference clock to a pseudorandom non-return to zero data stream in a clock data recovery system, and a system and method for generating a reference clock in the absence of a pseudorandom non-return to zero (NRZ) data stream in a system including a clock data recovery (CDR) unit.

REFERENCES:
patent: 5512860 (1996-04-01), Huscroft et al.
patent: 2002/0121937 (2002-09-01), Marutani et al.

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