Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2001-06-29
2003-09-09
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S112000, C257S666000, C257S701000, C264S272170
Reexamination Certificate
active
06617200
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, a method for fabricating the same, a circuit board and electronic devices.
2. Description of the Related Art
Currently, a package in which the back side of a die pad of a lead frame is exposed is known. However previously, in the fabrication process of this type of package, the molding process is carried out while a resin is being injected, so as to press the die pad against a mold. However, a problem with this technique is that it has not been possible to expose the die pad because the resin enters and remains between the die pad and the mold.
SUMMARY OF THE INVENTION
The present invention solves the foregoing problem. Accordingly, a purpose of the present invention is to provide a semiconductor device that makes it possible to expose the back side of a die pad, a method for fabricating the same, a circuit board and electronic devices.
The present invention provides a method for fabricating a semiconductor device by a molding process by setting a lead frame between first and second molds, wherein the lead frame has portions to be sandwiched by the first and second molds and a die pad down set at a distance greater than a depth of a recessed part of the first mold. The lead frame can be set by placing the die pad on the bottom of the recessed part of the first mold so that the portions to be sandwiched are suspended above the first mold and by using the second mold to press the portions to be sandwiched in the direction of the first mold.
According to the invention, the second mold presses the portions of the lead frame to be sandwiched by the first and second molds, and thereby the die pad is pressed against the bottom of the recessed part of the first mold. The molding process is carried out in this state. Thus, a sealing material does not enter between the die pad and the first mold and a part of the die pad can be exposed from a package.
In the method for fabricating this semiconductor device, a down set amount D of the die pad and a thickness T of the package formed in the molding process may have the relationship:
D
=(
T
/2)+(around 0.1 to 0.2 mm).
In the method for fabricating this semiconductor device, a pilot pin can be disposed on the first mold, a hole cab be formed in the lead frame, and the pilot pin can be fit into the hole to position the lead frame. Further, the pilot pin may have a tapered tip end and a base end raised from the first mold vertically.
According to this, the pilot pin has the tip end tapered, and thus it is easily fit into the hole of the lead frame. Additionally, the pilot pin can accurately position the lead frame with a small clearance to the hole at the base end raised from the first mold vertically.
In the method for fabricating this semiconductor device, the lead frame has an outer frame and bridge pins for coupling the die pad to the outer frame. Further, the down set amount D may be secured by forming the bridge pins from the die pad at an angle of about 15° or greater.
According to this, the angle between the bridge pin and the die pad is large (about 15° or greater), and thus the sealing material near the bridge pins can be prevented from falling off.
Additionally, a semiconductor device, circuit board and electronic device including the semiconductor device of the present invention can be fabricated by the method described above.
REFERENCES:
patent: 3672046 (1972-06-01), Storey, II et al.
patent: 6084310 (2000-07-01), Mizuno et al.
patent: 6242797 (2001-06-01), Ichikawa et al.
Berezny Nema
Jr. Carl Whitehead
Oliff & Berridge PLC.
Seiko Epson Corporation
LandOfFree
System and method for fabricating a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for fabricating a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for fabricating a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3067005