Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Patent
1997-11-26
2000-12-12
Follansbee, John A.
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
710 22, G06F 1200, G06F 1328
Patent
active
061611549
ABSTRACT:
A system and method for dynamically re-programming the acquisition cycle of a video acquisition system. The video acquisition system comprises a host computer and a video source. The host computer comprises a CPU, a system memory, and a video capture board. The video capture board receives a video signal from the video source. The video signal comprises a sequence of frames. The video capture board includes a DMA Controller which writes video frames to system memory under the control of a circularly linked list of commands. The linked list contains a plurality of sublists, each of which schedules the DMA transfer of a video frame to a corresponding video buffer in system memory. By removing a sublist from the linked list, a video buffer is removed from the set of buffers targeted for data transfer by the DMA Controller. By adding a sublist to the linked list, a video buffer is restored to the targeted set. A current or recently completed video buffer is removed from the targeted set in response to a request asserted by an application program.
REFERENCES:
patent: 5828901 (1998-10-01), O'Toole et al.
Repich Dan
Schultz Kevin L.
Follansbee John A.
Hood Jeffrey C.
National Instruments Corporation
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