Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2000-09-29
2003-11-25
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S770000
Reexamination Certificate
active
06654924
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to error correction of digitized phase signals from magnetoresistive (MR) and giant magnetoresistive (GMR) storage media heads.
2. Description of the Related Art
In data recording devices such as magnetic disk drives and tape drives, MR and GMR heads are used to read data that has been recorded on the devices. These heads detect magnetic transitions on the storage medium that have been previously established ( “written”) on the medium to represent data. The output voltage waveform of the head, mainly its phase, represents the transition locations and, thus, the data on the medium.
As recognized herein, random and systematic errors can be introduced in the output signal of read heads in several ways. For example, errors can be introduced by incorrect read performance of the read head itself. To detect errors, data can be encoded with error correction symbols prior to writing and then decoded during the read process and checked to determine whether any errors occurred, but it is possible that a loss of synchronization between the encoding and decoding operations may render this correction procedure useless. Errors can also be caused by so-called “thermal asperities”, wherein the head accidentally contacts the recording medium (or a particle that rests on the medium).
The focus of the present invention is to correct errors in the phases of multi-bit symbols. Block coding regimes have been proposed that include a set of codewords of length “n” defined over a Galois field alphabet and having the property of closure under addition or multiplication of any two codewords. In order to correct t<n errors, the codewords are written onto the recording medium with a separation of at least 2t+1 symbols from each other, with the checks being read along with the data and analyzed to determine whether any errors are present in the read data. As recognized by the present invention, however, block coding structure requires redundancy to guarantee the nonviolation of a code constraint which is vulnerable to loss of bit synchronization.
In addition, parity check schemes are well-known methods for detecting errors by inserting parity check bits into streams of data. As understood by the present invention, existing simple parity check schemes suffer the drawback that they will not detect certain errors. For instance, existing simple parity check methods will not detect single bit shifts unless bit synchronization is maintained, which unfortunately are common errors in magnetic recording at high linear densities and low signal to noise ratios. Moreover, parity check matrices are used to undertake hard decision post processing of blocks of detected bits, the error detection performance of which the present invention recognizes can be improved upon by soft algebraic detection of phase errors in the received data. Accordingly, the present invention solves one or more of the above-stated problems.
SUMMARY OF THE INVENTION
A data encoding device for encoding data to be recorded onto a magnetic recording medium includes a data state machine transforming phase symbols into bits to render a data stream. Also, the device includes a parity state machine inserting at least one parity symbol into the data stream each N-l symbols in accordance with a second constraint, such that the data stream after parity symbol insertion satisfies a first constraint. In a preferred non-limiting embodiment, the first constraint is a (1, 10) constraint and the second constraint is a (1, 7) constraint.
Preferably, a parity calculator receives an output from the data state machine. The parity calculator determines a parity that satisfies the first constraint, and the parity calculator provides an input to the parity state machine. Desirably, the parameter “N” is adjustable to adjust the encoding rate.
As set forth in detail below, the device undertakes multi-bit symbol correction by first performing symbol by symbol lattice-based maximum-likelihood decoding. This is done by means of calculating the nearest integer node on the lattice from the received digitized symbol phase measurement. This quantization procedure amounts to maximum-likelihood symbol decoding. Since a fixed relation exists between the lattice integer nodes and the multi-bit symbol alphabet, this procedure results in detected magnetic transition symbols. For each detected symbol, the quantization error, i.e. the distance between the received digitized symbol phase and the nearest-neighbor integer lattice node into which the symbol has been mapped, is also stored. This quantization error represents a measure of the reliability, i.e. the soft information, of the detected magnetic transition symbol.
Next, it is determined whether the detected magnetic transition symbol satisfies the catenation rule of the finite state machine constraint, imposed before writing, i.e. whether it can be legally catenated to the last detected symbol. Violation of the catenation rule indicates a symbol error, such that the erroneous symbol can be replaced by another symbol that does not violate the catenation rule and that furthermore is closest to the erroneously detected symbol in the lattice distance metric. The latter procedure always results in a sequence of N symbols that satisfy the catenation rule, at which point the symbol parity check is determined.
In the event of a parity failure, the symbol soft information is used to make a final decision on erasing the symbols most likely in error. The quantization errors are arranged in increasing reliability order, and the least unreliable, below a programmable threshold, is erased. It is to be understood that such an erasure decision algorithm should be adjusted to flexibly fit actual experimental data. The erasure flags are then supplied to an outer code.
In another aspect, a computer program device includes a computer readable medium having a program of instructions thereon for processing data associated with a magnetic recording medium. The program of instructions includes logic means for translating between phase symbols and data bits in accordance with a data recording constraint, and logic means for determining parity symbols in accordance with a parity constraint without violating the data recording constraint.
In still another aspect, a method for error correction in magnetic recording includes receiving digitized phase symbols representing bits from a recording, medium. The method also includes, for each symbol, determining a closest node on a lattice. Using maximum likelihood decoding, the method can be used to correct the most likely symbol errors.
In yet another aspect, a data decoding device includes plural state machines cooperating on received coded data to perform maximum likelihood decoding on the received coded data using soft algebraic error detection.
REFERENCES:
patent: 5257270 (1993-10-01), Hilden et al.
patent: 5271016 (1993-12-01), Hilden et al.
patent: 5487077 (1996-01-01), Hassner et al.
patent: 6018304 (2000-01-01), Bessios
patent: 6052248 (2000-04-01), Reed et al.
patent: 6282690 (2001-08-01), McClellan et al.
patent: 6304995 (2001-10-01), Smith et al.
patent: 6434719 (2002-08-01), Livingston
patent: 6526530 (2003-02-01), Nazari et al.
Stephen B. Wicker, “Error Control Systems for Digital Communication and Storage”, Prentice-Hall, 1995.*
S. Benedetto, D. Divsalar, G. Montorsi, and F. Pollara, “A Soft-Input Soft-Output Maximum A Posteriori (MAP) Module to Decode Parallel and Serial Concatenated Codes”, TDA Progress Report 42-127, Jet Propulsion Lab, NASA, Nov. 15, 1996.*
Publication: “Fast Quantizing and Decoding Algorithms for Lattice Quantizers and Codes”. Conway et al. IEEE, Transactions on Information Theory, vol. IT-28, No. 2, pp. 227-232. Mar. 1982.
Publication: “Codes Over Eisenstein-Jacobi Integers”. Huber. American Mathematical Society. Contemporary Mathematics, vol. 168, pp. 165-179. 1994.
Hassner Martin Aureliano
Rezzi Francesco
Trager Barry Marshall
De'cady Albert
Rogitz John L.
Torres Joseph D.
LandOfFree
System and method for error correction of digitized phase... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for error correction of digitized phase..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for error correction of digitized phase... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3119772