Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2005-10-11
2009-08-18
Sough, Hyung S (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S147000, C711S148000, C711S171000, C711S172000, C711S173000
Reexamination Certificate
active
07577813
ABSTRACT:
A system and method is disclosed for enumerating multi-level processor-memory affinities for non-uniform memory access systems. A processor-memory affinity hierarchy for each possible pairing of a microprocessor and a memory unit in an information-handling system is calculated using at least two characteristics relating to memory-access speed that describe how the microprocessors and memory units are arranged in the information-handling system. The information-handling system then performs an algorithm on each processor-memory affinity hierarchy to obtain processor-memory affinity values in the information-handling system, and populates a table using the processor-memory affinity values. An operating system in the information-handling system can use the table to allocate memory units among microprocessors in the information-handling system.
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Gupta Saurabh
Nijhawan Vijay B.
Wang Bi-Chong
Wu Wuxian
Baker & Botts L.L.P.
Dell Products L.P.
Patel Kaushikkumar
Sough Hyung S
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