System and method for enhancing I2C bus data rate

Details System and method for enhancing I2C bus data rate System and method for enhancing I2C bus data rate

2007-05-23

2010-06-15

Rinehart, Mark (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Protocol

C710S110000

Reexamination Certificate

active

07739435

ABSTRACT:
A system for, and method of, enhancing I2C bus data rate and an electronic assembly including the system or the method. In one embodiment, the system includes: (1) a modulus register associable with a slave device and configured to contain a modulus and (2) data transfer logic associated with the modulus register and configured to transfer data from at least one memory location in the slave device to the I2C bus based on the modulus and a starting address and at least one acknowledgement signal received via the I2C bus.

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Michael D. Gideons, “System and Method for Enhancing I2C Bus Data Rate” U.S. Appl. No. 60/822,763, Filed Dec. 29, 2006.

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