System and method for encoding page size information

Details System and method for encoding page size information System and method for encoding page size information

2006-08-29

2006-08-29

Bragdon, Reginald G. (Department: 2189)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S203000, C711S205000, C711S206000

Reexamination Certificate

active

07100018

ABSTRACT:
A system and method for encoding page size information has been described herein. In one embodiment, the method includes determining whether a virtual address is stored in a translation lookaside buffer (TLB), the TLB including a plurality of entries, wherein the entries include a minimum virtual page number bit string and a variable bit string. In one embodiment the method also includes determining whether the first bit string matches the minimum virtual page number bit string of one of the entries. In one embodiment, if the first bit string matches the minimum virtual page number bit string of one of the entries, the method includes decoding a page size stored in the variable portion of the matching entry and a 1-bit field associated with the matching entry, wherein the decoding determines a set of bits of the variable bit string.

REFERENCES:
patent: 5465337 (1995-11-01), Kong
patent: 5946716 (1999-08-01), Karp et al.
patent: 6047354 (2000-04-01), Yoshioka et al.
patent: 6446187 (2002-09-01), Riedlinger et al.
patent: 6549997 (2003-04-01), Kalyanasundharam
patent: 6625715 (2003-09-01), Mathews

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