System and method for enabling non-volatile memory to...

Details System and method for enabling non-volatile memory to... System and method for enabling non-volatile memory to...

2006-04-18

2006-04-18

Anderson, Matthew D. (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S103000

Reexamination Certificate

active

07032081

ABSTRACT:
A system and method for enabling concurrent usage of non-volatile memory for code execution and data storage/processing, comprising a hardware mechanism that can support automatic suspend and resume operations. This mechanism entails the integration of a suspend logic circuit and a resume logic circuit into the chip hardware, or the stationing of the logic chip in any way that it can operate together with the chip. This system and method enable a Flash memory chip to process code execution while it is processing erase/program operations, avoiding conflicts that ordinarily crash such a system. This is achieved by sensing the operation status of the chip and the CPU/Bus activity, and commanding the flash memory device to suspend and/or resume program/erase operations at appropriate times, so as not to conflict with read requests.

REFERENCES:
patent: 5333300 (1994-07-01), Fandrich
patent: 5463757 (1995-10-01), Fandrich et al.
patent: 5491790 (1996-02-01), Keeley et al.
patent: 6189070 (2001-02-01), See et al.

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