Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2002-09-24
2004-11-02
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06813748
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to integrated circuits. More particularly the invention relates to a system and method for enabling a vendor mode on an integrated circuit.
BACKGROUND
Many electronic devices and systems include integrated circuits for operating the devices and storing data during the operation of the devices. For example, electronic devices such as computers, printing devices, scanning devices, personal digital assistants, calculators, computer work stations, audio and/or video devices, communications devices such as cellular telephones, and routers for packet switched networks may include processors and memory in the form of integrated circuits. Advantages of using integrated circuits compared to other forms circuitry include space conservation and miniaturization, conserving limited battery resources, and cutting the costs of assembling the electronic devices.
Many integrated circuits include “vendor mode” circuitry that a vendor uses during the manufacturing of the integrated circuit, before the integrated circuit is sent out to a customer and incorporated into an electronic device, to test the internal operation of the integrated circuit. Vendor mode circuitry may include blocks of logic for testing whether selected features of the integrated circuit operate according to quality control specifications. Alternatively, the vendor mode circuitry may include redundant circuitry that substitutes for faulty sections of the integrated circuit in order to increase the production yield of the integrated circuits. Accessing the vendor mode circuitry may occur at a wafer level before the integrated circuit is packaged, or later at a packaged-chip level when the integrated circuit is in its final packaged form.
The vendor mode circuitry may be activated by a distinct sequence of logic values on selected pins of the integrated circuit package. Once in the vendor mode, the integrated circuit may disable the “user mode” or alternatively may operate in the vendor mode while the user mode is still active. The user mode corresponds to the command set and pin assignments available to the customer when the integrated circuit is incorporated into the electronic device and functioning. The vendor mode corresponds to another set of commands and a different assignment of pins that permit the vendor to select which test to perform on the integrated circuit, and to transfer test data between the vendor mode logic blocks and external testing equipment.
The vendor modes are intended to be available only to the vendor for testing, configuring, and/or modifying the integrated circuit internally before it is shipped to the customer. The customer is not allowed to access the vendor modes. Therefore the distinct sequence of logic values on selected pins of the integrated circuit package that activate the vendor mode are not disclosed to the customer.
During operation in the electronic device, however, the integrated circuit may accidentally receive the distinct sequence of logic values on the selected pins that cause the integrated circuit to exit the user mode and enter the vendor mode. Examples of circumstances that may give rise to the accidental generation of the vendor mode enabling logic values include noise on the selected pins, power surges, software errors that generate the distinct sequence, and user errors in providing data to the integrated circuit. When the integrated circuit accidentally enters the vendor mode, normal operation of the integrated circuit may be interrupted and the electronic device may cease to operate as intended.
In order to prevent the accidental entering into the vendor modes, the vendor may permanently disable the vendor mode circuitry before the integrated circuit is sent to the customer. For example, the vendor may blow a programmable fuse that disables the vendor mode circuitry and cannot be reset once it is blown. One example of a programmable fuse is a narrow polysilicon line on the integrated circuit that is blown by cutting with a precision laser. Another example of a programmable fuse is a narrow polysilicon line on the integrated circuit that is blown by passing a fusing current through the line.
But if an integrated circuit is returned from the customer because it is suspected of having failed in operation, the vendor may prefer to reactivate the vendor modes to test the integrated circuit and determine the cause of the failure, if any. The vendor may then determine whether the integrated circuit failed, the integrated circuit is operational and the fault lies in other components in the electronic device, or the customer accidentally enabled the vendor mode. Permanently disabled vendor mode circuitry, however, cannot be reactivated.
SUMMARY
A system and method are described below to address the need for a system and method of enabling a vendor mode on an integrated circuit that prevents accidental activation by a customer or by signals from the electronic device in which the integrated circuit is operating.
In accordance with one aspect of the invention, a system for enabling a vendor mode in an integrated circuit is provided that includes a coincidence circuit, a no-connect pin, and recognition circuitry. The coincidence circuit has a first input, a second input, and a first output. The first output activates vendor mode circuitry in response to a first signal on the first input and a concurrent second signal on the second input. The no-connect pin communicates with the first input. The recognition circuitry has a set of inputs and a second output. The second output is connected to the second input of the coincidence circuit and generates the second signal in response to a sequence of logic values on the set of inputs.
Another aspect is a method of enabling a vendor mode in an integrated circuit that includes (a) detecting a first potential at a no-connect pin, (b) detecting a sequence of logical values on a set of pins, and (c) activating vendor mode circuitry in response to whether (a) and (b) are concurrent.
Yet another aspect is a method of enabling a vendor mode in an integrated circuit, where the integrated circuit includes a no-connect pin and a set of pins for activating vendor mode circuitry in response to a sequence of logical values on the set of pins. The method includes applying a potential to the no-connect pin and concurrently applying the sequence of logical values to the set of pins.
A further aspect is a system for enabling a vendor mode in an integrated circuit that includes (a) means for detecting a first potential at a no-connect pin, having a first output, (b) means for detecting a sequence of logical values on a set of pins, having a second output, and (c) means for activating vendor mode circuitry, having a first input connected to the first output of (a), a second input connected to the second output of (b), and a third output. The third output activates the vendor mode circuitry in response to whether the first potential and the sequence of logical values are concurrent.
The foregoing and other features and advantages of preferred embodiments will be more readily apparent from the following detailed description, which proceeds with reference to the accompanying drawings.
REFERENCES:
patent: 5914968 (1999-06-01), Keeth
patent: 5936974 (1999-08-01), Roberts et al.
patent: 6240535 (2001-05-01), Farnworth et al.
patent: 6606270 (2003-08-01), Mullarkey
patent: 2002/0186603 (2002-12-01), Kyung
Hegde Shailesh U.
Isom, III Melvin T.
Infineon - Technologies AG
Siek Vuthe
Tat Binh
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