Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Virtual machine memory addressing
Reexamination Certificate
2000-07-17
2003-11-18
Ellis, Kevin L. (Department: 2186)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
Virtual machine memory addressing
C711S203000, C711S206000, C711S208000, C711S209000
Reexamination Certificate
active
06651132
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates in general to the field of virtual memory management and, more particularly, to a method for emulating the operation of a memory management unit.
BACKGROUND OF THE INVENTION
Computers include general purpose central processing units (CPUs) that are designed to execute a specific set of system instructions. A group of processors that have similar architecture or design specifications may be considered to be members of the same processor family. Examples of current processor families include the Motorola 680×0 processor family, manufactured by Motorola, Inc. of Phoenix, Arizona; the Intel 80×86 processor family, manufactured by Intel Corporation of Sunnyvale, Calif.; and the PowerPC processor family, which is manufactured by Motorola, Inc. and used in computers manufactured by Apple Computer, Inc. of Cupertino, Calif. Although a group of processors may be in the same family because of their similar architecture and design considerations, processors may vary widely within a family according to their clock speed and other performance parameters.
Each family of microprocessors executes instructions that are unique to the processor family. The collective set of instructions that a processor or family of processors can execute is known as the processor's instruction set. As an example, the instruction set used by the Intel 80×86 processor family is incompatible with the instruction set used by the PowerPC processor family. The Intel 80×86 instruction set is based on the Complex Instruction Set Computer (CISC) format. The Motorola PowerPC instruction set is based on the Reduced Instruction Set Computer (RISC) format. CISC processors use a large number of instructions, some of which can perform rather complicated functions, but which require generally many clock cycles to execute. RISC processors use a smaller number of available instructions to perform a simpler set of functions that are executed at a much higher rate.
The uniqueness of the processor family among computer systems also typically results in incompatibility among the other elements of hardware architecture of the computer systems. A computer system manufactured with a processor from the Intel 80×86 processor family will have a hardware architecture that is different from the hardware architecture of a computer system manufactured with a processor from the PowerPC processor family. Because of the uniqueness of the processor instruction set and a computer system's hardware architecture, application software programs are typically written to run on a particular computer system running a particular operating system.
A computer manufacturer will want to maximize its market share by having more rather than fewer applications run on the microprocessor family associated with the computer manufacturer's product line. To expand the number of operating systems and application programs that can run on a computer system, a field of technology has developed in which a given computer having one type of CPU, called a host, will include an emulator program that allows the host computer to emulate the instructions of an unrelated type of CPU, called a guest. Thus, the host computer will execute an application that will cause one or more host instructions to be called in response to a given guest instruction. Thus, the host computer can both run software design for its own hardware architecture and software written for computers having an unrelated hardware architecture. As a more specific example, a computer system manufactured by Apple Computer, for example, may run operating systems and program written for PC-based computer systems. It may also be possible to use an emulator program to operate concurrently on a single CPU multiple incompatible operating systems. In this arrangement, although each operating system is incompatible with the other, an emulator program can host one of the two operating systems, allowing the otherwise incompatible operating systems to run concurrently on the same computer system.
When a guest computer system is emulated on a host computer system, the guest computer system is said to be a virtual machine, as the host computer system exists only as a software representation of the operation of the hardware architecture of the guest computer system. The terms emulator and virtual machine are sometimes used interchangeably to denote the ability to mimic or emulate the hardware architecture of an entire computer system. As an example, the Virtual PC software created by Connectix Corporation of San Mateo, Calif. emulates an entire computer that includes an Intel 80×86 Pentium processor and various motherboard components and cards. The operation of these components is emulated in the virtual machine that is being run on the host machine. An emulator program executing on the operating system software and hardware architecture of the host computer, such as a computer system having a PowerPC processor, mimics the operation of the entire guest computer system. The emulator program acts as the interchange between the hardware architecture of the host machine and the instructions transmitted by the software running within the emulated environment.
Because the size of application programs has increased over time and because there are operating advantages afforded to multitasking operating system environments, many computer systems employ a virtual memory system in which a large virtual address space is defined for each application program. The virtual memory is divided into blocks of memory known as pages. To accommodate the size of the virtual address space, a limited number of the virtual memory pages are mapped to short-term physical memory, such as dynamic RAM. The remainder of the virtual memory pages are mapped to long-term storage, such as hard disk drives. The division of virtual memory between short-term RAM storage and long-term hard disk storage is an aid to multitasking operating systems in that several programs can share the RAM memory of the system.
Virtual memory systems are implemented through the use of a page table, which is an indexed data structure that relates logical memory addresses to physical memory addresses. Because programs operating in a virtual memory system will access data locations according to their virtual memory address, the virtual memory address must be translated to a physical memory address to complete the read or write operation. The page table is used by the operating system to translate the virtual page address to a physical page address. A page table contains virtual to physical memory translations consisting of a virtual page number and a corresponding physical page number. Following the translation, the processor accesses the data using the physical page address.
Because tables are often stored in main memory, access to virtual memory is often time-consuming. Virtual memory requires two memory accesses to fetch a single entry from memory. The first access is to the page table and is made to map the virtual address to the physical address. After the physical address is known, a second access is required to fetch the data from physical memory. In an effort to speed up memory accesses, conventional microprocessors use a special purpose cache memory to store certain virtual to physical memory address translations. This cache is often referred to as a translation look-aside buffer (TLB). The number of virtual to physical memory translations in a TLB is typically smaller than the total number of translations in the page table. In operation, prior to seeking the translation of a of a virtual address from the page tables stored in main memory, a processor can first refer to the TLB to determine whether the physical address translation of the virtual address is stored in the TLB. If the translation of the virtual address to the physical address is stored in the TLB, the TLB outputs to the process the physical address and a time-consuming access to main memory is avoided.
Ma
Ellis Kevin L.
Elmore Stephen
Microsoft Corporation
Woodcock & Washburn LLP
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