Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2008-07-01
2008-07-01
Chase, Shelly (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
07395488
ABSTRACT:
In a device that utilizes a memory device, the access bandwidth of the memory device is efficiently utilized by determining a set of operations to be performed on information stored in the memory device, and sorting the operations into an order so as to minimize the number of accesses to the memory device to perform the operations. The sorted operations are then performed in that order. An example of such a device is an error correction decoder, such as for use with an optical disk reader or player. The error correction decoder generates error correction data, representing error correction operations, and sorts the error correction data into multiple sets, each set for correcting the errors in a respective row of an ECC block stored in an external buffer. The error correction operations are then performed row by row.
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Finkelstein Jacob Moshe
Kol Rakefet
Levinger Asa
Chase Shelly
Morgan & Lewis & Bockius, LLP
Zoran Corporation
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