System and method for efficient convolutional...

Details System and method for efficient convolutional... System and method for efficient convolutional...

2005-11-29

2005-11-29

Lamarre, Guy J. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S702000, C714S762000

Reexamination Certificate

active

06971057

ABSTRACT:
A memory optimized system and method for data interleaving/de-interleaving are disclosed. A data interleaver/de-interleaver may be implemented with a memory device and an improved data interleaver/de-interleaver. The improved data interleaver/de-interleaver may be implemented with a controller, a first array, and a second array. The first array identifies a maximum depth value for each of a plurality of memory segments responsive to both a block data length and the desired interleaving/de-interleaving depth. The second array comprises an index associated with each of the plurality of memory segments that may be used to derive write and read addresses. In its broadest terms, the method can be described as: identifying a block data length, N, and an interleaver/de-interleaver depth, D; initializing a set of pointers associated with each of N memory segments; initializing a set of pointer maximum values responsive to the relative magnitude of N and D, identifying a memory index responsive to a base address and the set of pointer maximum values; using a memory segment identifier, a word identifier, and a byte identifier along with the memory index and the pointers to write/read the bytes of code words.

REFERENCES:
patent: 5737337 (1998-04-01), Voith et al.
patent: 5745497 (1998-04-01), Ben-Efraim et al.
patent: 5991857 (1999-11-01), Koetje et al.
patent: 6151690 (2000-11-01), Peeters
patent: 6421796 (2002-07-01), Gatherer

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