Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Patent
1998-03-19
2000-06-13
Thai, Xuan M.
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
710130, 710 52, G06F 1338
Patent
active
06076130&
ABSTRACT:
The inventive mechanism has a bypassable transaction that is directly loaded to the bypass queue. For example, all read transactions from a PCI bus are directly loaded to the bypass queue. This avoids the route through the common queue to the bypass queue for a read transaction that cannot be loaded on the second PCI bus. Two single bit wide queues are required to enforce ordering, the lock queue and the key queue. The lock queue has the same depth as the bypass queue and is affiliated to it. The key queue is affiliated to the common queue and has the same depth as the common queue. When an entry is loaded to the bypass queue, it is locked by setting the corresponding bit in the lock queue to 1 if there is at least one entry in the common queue and the previous entry was loaded into the common queue. If an incoming transaction to the bypass queue is locked in the lock queue, the entry in the key queue corresponding to the last entry in the common queue is also set to 1. Thus, for every locked entry in the bypass queue a key is set in the common queue. A locked entry cannot be unloaded until the corresponding keyed entry is unloaded.
REFERENCES:
patent: 5535341 (1996-07-01), Shah et al.
patent: 5687329 (1997-11-01), Kaiser et al.
patent: 5729767 (1998-03-01), Jones et al.
patent: 5911084 (1999-06-01), Jones et al.
Hewlett--Packard Company
Thai Xuan M.
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