Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2000-05-19
2004-07-13
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C713S300000, C713S310000, C713S323000, C713S324000, C330S254000, C330S278000, C330S279000, C330S280000, C330S127000
Reexamination Certificate
active
06763470
ABSTRACT:
FIELD OF INVENTION
This invention generally relates to power amplifiers, and more particularly to a dynamically switched power amplifier having improved power efficiency.
BACKGROUND OF INVENTION
Over recent years, many technological advances have been made allowing the general public access to mobile communication devices such as PCS and digital cellular systems. Unfortunately, these systems suffer from one major drawback: power consumption.
Although much improved over recent years, power consumption has remained one of the central issues facing the mobile communications market. Excessive power consumption reduces the usability of these devices due to the down time for recharging the batteries, etc. Conversely, lower power consumption directly translates into longer battery life and less recharging downtime.
Another technology area in which power conception is important is the area of high-speed data communications products. In this area, there are a number of issues related to power consumption, including: (1) the actual costs of the power consumed by communications systems, (2) the challenges associated with the dissipation of excessive power consumption, which may include forced air cooling, convection cooling, additional heat sinks, etc. and (3) excessive heat resulting from high power consumption limits the circuit density, thus requiring additional space for a communications networking system. This may force an Internet service provider (ISP) or an enterprise networking system to seek additional space to house power-hungry equipment.
Power consumption reductions are partially addressed by advances in semiconductor processes along with transistor geometries which “shrink” over time, thus reducing switching capacitance and supply voltages, which in turn reduces the overall power consumption of digital integrated circuits Furthermore, multiple functions are now often placed on a single chip, eliminating external buses and their associated connections.
To date, similar advances have not been made in the analog domain. Attempts have been made, however, to reduce power consumption of the analog devices. These include linear amplifiers that typically are used for a variety of communications functions such as cellular phones and xDSL systems. A variety of amplifier techniques, or “classes,” have been developed over the years in an attempt to optimize amplifiers for particular applications. These amplifier classes are referred to as class A, B, AB, D, G, and H amplifiers. The structure and/or characteristics of amplifiers in these classes will be understood by persons skilled in the art, and need not be described herein. Suffice it to say that each amplifier class has unique advantages.
Class A, B, and AB operate during a specific amount of the signal time and may be configured in a manner that minimizes distortion while lowering power consumption. Class D, G, and H have been designed to improve the power efficiency even more, at the expense of additional distortion. Class D amplifiers uses switching transistors and pulse width modulation to “digitize” a signal and then “reintegrate” it to reconstruct the signal. Unfortunately, these amplifiers may have extremely poor audio response and introduce much distortion to the signal, particularly at the high frequencies associated with xDSL and other communications signals. Class G amplifiers use multiple voltage rails to efficiently amplify signals with a large dynamic range. Careful selection of the ratio of power supply rails along with the number of supply voltages in a class G amplifier can result in a relative efficient amplifier for certain types of signals. Class H amplifiers yield results similar to class G but rely on continuously variable voltage rails in response to the input signal, to optimize the efficiency and distortion of the amplifier.
In view of the foregoing, it would be advantageous to have an amplifying system that was power efficient while exhibiting minimal distortion.
SUMMARY OF INVENTION
The present invention is directed to a signal processing and amplifying system that uses advance knowledge of a digital signal, before it is converted to analog form and applied to the input stage of the amplifier stage, to “intelligently” amplify the signal with the maximum power efficiency and minimal distortion. This advance knowledge of the digital signal allows a switch control logic (SCL) unit to open and close solid state switches and seamlessly turn off and on the low and high power stages correctly to minimize the amplifier distortion while conserving power.
The system comprises a shift register, which receives the supplied digital signal to be amplified and delays the digital signal by a known amount, a digital to analog converter, an amplifying circuit, which is made up of at least two amplifiers, and an SCL unit. The SCL unit comprises control logic, and multiple solid state switches. The SCL unit monitors the digital signal to determine when to activate/deactivate amplifier stages and open/close switches for the most power efficient operation.
This system and method efficiently amplifies signals with low distortion due to the intelligent use of solid state switches, via the SCL unit to monitor exactly when to enable/disable amplifier stages. This system achieves low distortion and power efficient amplification—necessary to a variety of systems from cellular phones, mobile electronics, and high-density line cards for DSL and other communications services.
REFERENCES:
patent: 5053770 (1991-10-01), Mayer et al.
patent: 5256987 (1993-10-01), Kibayashi et al.
patent: 5834975 (1998-11-01), Bartlett et al.
patent: 5872481 (1999-02-01), Sevic et al.
patent: 5898342 (1999-04-01), Bell
patent: 5923213 (1999-07-01), Darthenay et al.
patent: 6215987 (2001-04-01), Fujita
patent: 6281944 (2001-08-01), Kim
patent: 6353364 (2002-03-01), Klemmer
patent: 6463269 (2002-10-01), DeMarco
patent: 6567476 (2003-05-01), Kohl et al.
patent: 6615028 (2003-09-01), Loke et al.
patent: 04127758 (1992-04-01), None
Adel S. Sedra and Kenneth C. Smith, Microelectronic Circuits, 1991, Saunderss College Publishing, pp. 742-747.*
Elwan, H.O.; Ismail, M.; “Low voltage digitally controlled dB-linear CMOS VGA circuit for wireless communication”, Electronics Circuits and Systems, 1998 IEEE International Conference on, vol.: 1, Sep. 7-10, 1998, pp. 341-344 vol. 1.*
Tripath, Technical Information—AN1, “Class T Digital Audio Amplifier Technology Overview”, Apr. 12, 1999.
Bell Russell W.
Smithwick Luke J.
Browne Lynne H.
Globespanvirata, Inc.
Thomas Kayden Horstemeyer & Risley
Trujillo James K.
LandOfFree
System and method for dynamically amplifying a delayed... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for dynamically amplifying a delayed..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for dynamically amplifying a delayed... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3249690