System and method for dynamically allocating inter...

Details System and method for dynamically allocating inter... System and method for dynamically allocating inter...

2007-07-24

2007-07-24

Perveen, Rehana (Department: 2116)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

Reexamination Certificate

active

11164664

ABSTRACT:
A system for dynamically allocating inter integrated circuits (I2C) addresses to multiple slave includes a host (1), a plurality of slaves (2) and an I2C bus (3). Each slave includes a processor (20) for performing an I2C address allocating program (200), which includes a signal setting module (201), a delay controlling module (202) and an I2C address calculating module (203). The signal setting module is used for setting a signal value of an input pin of each slave, and checking the signal value of an output pin of each slave. The delay controlling module is used for controlling a synchronous booting error time for each slave, and setting a security time for allocating a unique I2C address to each slave. The I2C address calculating module is used for calculating a unique I2C address for each slave, and obtaining the I2C address from the host. A related method is also disclosed.

REFERENCES:
patent: 6295053 (2001-09-01), Tsai et al.
patent: 6622177 (2003-09-01), Eilert et al.
patent: 6629172 (2003-09-01), Andersson et al.
patent: 6745270 (2004-06-01), Barenys et al.

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