Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-09-12
2006-09-12
Kim, Hong (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S170000, C711S133000, C711S135000, C709S226000
Reexamination Certificate
active
07107403
ABSTRACT:
A method and system for dynamically allocating cache space in a storage system among multiple workload classes each having a unique set of quality-of-service (QoS) requirements. The invention dynamically adapts the space allocated to each class depending upon the observed response time for each class and the observed temporal locality in each class. The dynamic allocation is achieved by maintaining a history of recently evicted pages for each class, determining a future cache size for the class based on the history and the QoS requirements where the future cache size might be different than a current cache size for the class, determining whether the QoS requirements for the class are being met, and adjusting the future cache size to maximize the number of classes in which the QoS requirements are met. The future cache sizes are increased for the classes whose QoS requirements are not met while they are decreased for those whose QoS requirements are met.
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Improving Disk Cache Hit-Raios Through Cache Partitioning, Dominique Thiebaut, Member IEEE, Harold S. Stone, Fellow iEE, and Joel L. Wolf.
Goyal Pawan
Jadav Divyesh
Modha Dharmendra Shantilal
Tewari Renu
International Business Machines - Corporation
Kim Hong
Tran Khanh Q.
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