Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2005-02-01
2005-02-01
Nguyen, T (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S153000, C711S170000, C711S171000, C711S172000, C711S173000
Reexamination Certificate
active
06851030
ABSTRACT:
A method and structure for balancing associative resource (e.g., cache lines or buffers) allocation with respect to load, wherein said resources are allocated/deallocated to requesting processes or “agents” based on their reference history and demand. User agents that fail to meet minimum use criteria, are forced to relinquish logically allocated resources to high demand agents. Otherwise, an agent maintains control of its resources in the presence of other high demand agents, without cross-agent thrashing for resources. An associative resource “pool” is logically divided into m partitions. A small “partition reference” counter is employed for each partition to record its usage history. A global “persistence reference” counter functions to erase the “set reference” counter history at a programmable rate. Low “partition reference” counter values imply low usage, and make partition resources available to high usage partition(s) when needed. Programmable thresholds permit “weighting” the criteria for system optimization.
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Nguyen T
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