System and method for dynamic bus access prioritization and arbi

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395296, 395732, G06F 1336

Patent

active

055600166

ABSTRACT:
In a computer system having a plurality of devices coupled to a bus, the plurality of devices having a bus master mode allowing a selected one of the devices to function as a bus master and adapted to request designation as a bus master, an arbitration circuit and method of arbitration for determining which one of the plurality of devices is to function as the bus master when two of the plurality of devices coincidentally request the designation. The arbitration circuit comprises: (1) a tabulation circuit for tabulating a relative number of times each of the plurality of devices requests designation as bus master of each of the plurality of devices and (2) a comparison circuit coupled to the tabulation circuit for granting only one of the coinciding requests as a function of the relative number of times each of the plurality of devices requests designation as bus master to thereby allow a bus master priority level between the plurality of devices to change as a function of the relative request activity of the plurality of devices.

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