System and method for dual IDE channel servicing using...

Details System and method for dual IDE channel servicing using... System and method for dual IDE channel servicing using...

2005-07-26

2005-07-26

Peyton, Tammara (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

C710S020000, C710S021000, C710S033000, C710S005000

Reexamination Certificate

active

06922739

ABSTRACT:
An integrated receiver with dual channel transport stream decoding and delivery substantially implemented on a single CMOS integrated circuit is described. For multiple channel transfers to hard disk drive storage, a multiplexed IDE host interface is provided with shared pins for data, address, and chip-select lines of the IDE interface so that multiple hard drives may be interfaced using the common pins of the integrated circuit.

REFERENCES:
patent: 5905885 (1999-05-01), Richter et al.
patent: 6697867 (2004-02-01), Chong, Jr.
patent: 6845409 (2005-01-01), Talagala et al.
patent: 2003/0074515 (2003-04-01), Resnick

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